How To Optimize An EMI Test?

 

Navigating the unseen realms: Understanding EMI (Electromagnetic Interference) and its impact on electronic devices. Explore solutions with H.B. Compliance for a noise-free, reliable operation. It can be generated by sparking on motor brushes, machines (like welding equipment), power-circuit switches, activation of inductive and resistive loads, and more.

Electronic systems in industrial, automotive, and personal-computing applications are becoming increasingly dense and interconnected. To improve the functionality of these systems, diverse circuits are packed in close proximity.  These circuits using radio-frequency (RF) chipsets, microprocessors, voltage regulators, and integrated-circuit (IC) chips all emit electromagnetic radiation.

Addressing EMI challenges for OPTIMIZE AN EMI TEST: Unraveling the impact of high switching speeds in switch-mode power supplies (SMPS) and exploring solutions. Stay compliant with Ecfr.government standards for efficient and cost-effective power supplies. However, they worsen the EMI problem due to fast edge rates on switching nodes and additional ringing along switching edges wrought by parasitic inductances in the power loop.  With faster and faster rise and fall times (dV/dt) for voltage and current waveforms, these fast edges produce significant energy manifested as EMI.

As long as voltages and currents are being switched, EMI will be generated and thus must be addressed.  Without proper mitigation, excessive input- or output-voltage ripple can compromise operation of the source, load, or adjacent system.

Types of EMI Coupling

Radiated EMI consists of both electric and magnetic fields transmitted over a distance.  It is high frequency in nature and can extend from several hundred megahertz into the gigahertz range.

EMI Standards

EMI can no longer be an afterthought, given its potential to cause significant setbacks late in the design phase that cost both time and money.  But beyond that, all products must generally meet some type of EMI performance metric, whether established in the product’s design specifications or to comply with regulatory requirements.

Conventional and Advanced Techniques

Increased power density, faster switching, and higher current is forcing designers to spend more time considering the effects of EMI.

Common EMI control techniques

Layout optimization and component selection

Navigating the complexities of EMI compliance for OPTIMIZE AN EMI TEST: Understanding the impact of regulators and power supplies on electromagnetic interference. Treat every signal and power trace on a PCB as a transmission line. Ensure a seamless path to Equipment Certification by considering every aspect, from ground structure design to IC and capacitor selection to PCB layout.

 Simple snubber circuits (a simple RC filter from the switch node to GND)

This technique does result in increased losses, negatively impacting efficiency.  Since a high percentage of the EMI is generated by the fast rise and fall times, reducing the slew rate of the gate turn-on is a good way to lower emissions while maintaining an acceptable efficiency decrease.

 Spread-spectrum frequency modulation

Unveiling the power of spread spectrum in EMI reduction: A versatile technique for minimizing electromagnetic interference. Learn about its ease of implementation and compatibility with other reduction methods. Delve into its effectiveness across low-EMI frequencies, where fundamentals and harmonics are diminished. Compliant with etsi.organization standards for optimal performance.

A good rule of thumb in working with any high frequencies is to keep all component leads and PCB traces short.  Determine the hot loop (high di/dt loop) in the power-supply circuit and reduce its impact by shortening the wires in the hot loop.

You can remove the traditional wire bond method of connecting the die to the package pins.  In the package, copper pillars are added and the silicon is flipped, further minimizing the area of hot loops by shortening the distance from the internal FET to the package pin and the input capacitors.

All of the above contingencies come with drawbacks.  There’s an inherent power density and efficiency tradeoff to achieve lower EMI solutions.

 

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